<?xml version="1.0" encoding="utf-8"?>
<Description>ESC Rev/Type</Description>
<Description>Type</Description>
<Description>ESC10/ESC20</Description>
<Description>IP Core</Description>
<Description>ET1100</Description>
<Description>ET1200</Description>
<Description>Revision</Description>
<Description>ESC Build</Description>
<Description>Maintenance version</Description>
<Description>Minor version</Description>
<Description>SM/FMMU Cnt</Description>
<Description>FMMU cnt</Description>
<Description>SM cnt</Description>
<Description>Ports/DPRAM</Description>
<Description>DPRAM (Kbyte)</Description>
<Description>Port A</Description>
<Description>Not implemented</Description>
<Description>Not configured (EEPROM)</Description>
<Description>EBUS</Description>
<Description>MII/RMII</Description>
<Description>Port B</Description>
<Description>Not implemented</Description>
<Description>Not configured (EEPROM)</Description>
<Description>EBUS</Description>
<Description>MII/RMII</Description>
<Description>Port C</Description>
<Description>Not implemented</Description>
<Description>Not configured (EEPROM)</Description>
<Description>EBUS</Description>
<Description>MII/RMII</Description>
<Description>Port D</Description>
<Description>Not implemented</Description>
<Description>Not configured (EEPROM)</Description>
<Description>EBUS</Description>
<Description>MII/RMII</Description>
<Description>Features</Description>
<Description>FMMU Operation</Description>
<Description>Bit oriented</Description>
<Description>Byte oriented</Description>
<Description>DC support</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>DC 64 bit support</Description>
<Description>FALSE</Description>
<Description>E-Bus low jitter</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>E-Bus ext. link detection</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>MII ext. link detection</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Separate Handling of FCS Errors</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>DC SYNC ext. Activation</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>EtherCAT LRW cmd. support</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>EtherCAT R/W cmd. support</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Fixed FMMU/SM Cfg.</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Phys Addr</Description>
<Description>Configured Station Alias</Description>
<Description>Register Protect</Description>
<Description>Access Protect</Description>
<Description>ESC Reset</Description>
<Description>ESC reset ECAT</Description>
<Description>ESC reset PDI</Description>
<Description>ESC Ctrl</Description>
<Description>Kill non EtherCATframes</Description>
<Description>Temporary loop control</Description>
<Description>Permanent use</Description>
<Description>Use for about 1 sec.</Description>
<Description>Port A</Description>
<Description>Auto loop</Description>
<Description>Auto close</Description>
<Description>Loop open</Description>
<Description>Loop closed</Description>
<Description>Port B</Description>
<Description>Auto loop</Description>
<Description>Auto close</Description>
<Description>Loop open</Description>
<Description>Loop closed</Description>
<Description>Port C</Description>
<Description>Auto loop</Description>
<Description>Auto close</Description>
<Description>Loop open</Description>
<Description>Loop closed</Description>
<Description>Port D</Description>
<Description>Auto loop</Description>
<Description>Auto close</Description>
<Description>Loop open</Description>
<Description>Loop closed</Description>
<Description>ESC Ctrl Ext</Description>
<Description>RX FIFO size</Description>
<Description>EBUS Low jitter</Description>
<Description>Normal jitter</Description>
<Description>Reducedjitter</Description>
<Description>EBUSremote link down signaling time</Description>
<Description>Default</Description>
<Description>Reduced</Description>
<Description>Station alias</Description>
<Description>Ignore</Description>
<Description>Available</Description>
<Description>Phys. RW Offset</Description>
<Description>ESC Status</Description>
<Description>Operation</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>PDI watchdog</Description>
<Description>expired</Description>
<Description>reloaded</Description>
<Description>Enh. Link Detection</Description>
<Description>Deactive</Description>
<Description>Active</Description>
<Description>Physical link Port A</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Physical link Port B</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Physical link Port C</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Physical link Port D</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port A</Description>
<Description>Loop Open, no link</Description>
<Description>Loop closed, no link</Description>
<Description>Loop open, with link</Description>
<Description>Loop closed, with link</Description>
<Description>Port B</Description>
<Description>Loop Open, no link</Description>
<Description>Loop closed, no link</Description>
<Description>Loop open, with link</Description>
<Description>Loop closed, with link</Description>
<Description>Port C</Description>
<Description>Loop Open, no link</Description>
<Description>Loop closed, no link</Description>
<Description>Loop open, with link</Description>
<Description>Loop closed, with link</Description>
<Description>Port D</Description>
<Description>Loop Open, no link</Description>
<Description>Loop closed, no link</Description>
<Description>Loop open, with link</Description>
<Description>Loop closed, with link</Description>
<Description>AL Ctrl</Description>
<Description>AL Ctrl</Description>
<Description>INIT</Description>
<Description>Bootstrap</Description>
<Description>PREOP</Description>
<Description>SAFEOP</Description>
<Description>OP</Description>
<Description>Error Ack</Description>
<Description>Device Identification</Description>
<Description>No request</Description>
<Description>Device Identification request</Description>
<Description>AL Status</Description>
<Description>AL Status</Description>
<Description>INIT</Description>
<Description>Bootstrap</Description>
<Description>PREOP</Description>
<Description>SAFEOP</Description>
<Description>OP</Description>
<Description>Error</Description>
<Description>Device Identification</Description>
<Description>not valid</Description>
<Description>loaded</Description>
<Description>AL Status Code</Description>
<Description>RUN/ERR LED Override</Description>
<Description>RUN LED Code</Description>
<Description>Off</Description>
<Description>Flash 1x</Description>
<Description>Flash 2x</Description>
<Description>Flash 3x</Description>
<Description>Flash 4x</Description>
<Description>Flash 5x</Description>
<Description>Flash 6x</Description>
<Description>Flash 7x</Description>
<Description>Flash 8x</Description>
<Description>Flash 9x</Description>
<Description>Flash 10x</Description>
<Description>Flash 11x</Description>
<Description>Flash 12x</Description>
<Description>Blinking</Description>
<Description>Flickering</Description>
<Description>On</Description>
<Description>Enable RUN LED Override</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>ERR LED Code</Description>
<Description>Off</Description>
<Description>Flash 1x</Description>
<Description>Flash 2x</Description>
<Description>Flash 3x</Description>
<Description>Flash 4x</Description>
<Description>Flash 5x</Description>
<Description>Flash 6x</Description>
<Description>Flash 7x</Description>
<Description>Flash 8x</Description>
<Description>Flash 9x</Description>
<Description>Flash 10x</Description>
<Description>Flash 11x</Description>
<Description>Flash 12x</Description>
<Description>Blinking</Description>
<Description>Flickering</Description>
<Description>On</Description>
<Description>Enable ERR LED Override</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<!--PDI/ESC Configuration-->
<Description>PDI Ctrl</Description>
<Description>PDI</Description>
<Description>none</Description>
<Description>4 Digital Input</Description>
<Description>4 Digital Output</Description>
<Description>2 DI and 2 DO</Description>
<Description>Digital I/O</Description>
<Description>SPI Slave</Description>
<Description>Oversampling I/O</Description>
<Description>EtherCAT Bridge (port3)</Description>
<Description>uC async. 16bit</Description>
<Description>uC async. 8bit</Description>
<Description>uC sync. 16bit</Description>
<Description>uC sync. 8bit</Description>
<Description>32 Digital Input and 0 Digital Output</Description>
<Description>24 Digital Input and 8 Digital Output</Description>
<Description>16 Digital Input and 16 Digital Output</Description>
<Description>8 Digital Input and 24 Digital Output</Description>
<Description>0 Digital Input and 32 Digital Output</Description>
<Description>On-chip bus</Description>
<Description>Device emulation</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Enhanced link detection all ports</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>DC SYNC Out Unit</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>DC Latch In Unit</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>Enhanced link port 0</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>Enhanced link port 1</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>Enhanced link port 2</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>Enhanced link port 3</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>PDI Information</Description>
<Description>PDI register function ack. by write </Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>PDI configured</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>PDI Active</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>PDI config. invalid</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>PDI Cfg</Description>
<Description>OUTVALID polarity</Description>
<Description>Active high</Description>
<Description>Active low</Description>
<Description>OUTVALID mode</Description>
<Description>Output event signaling</Description>
<Description>WD_TRIG signaling</Description>
<Description>mode of direction</Description>
<Description>Unidirectional</Description>
<Description>Bidirectional</Description>
<Description>Watchdog behavior</Description>
<Description>Immediately output reset</Description>
<Description>Wait output reset</Description>
<Description>Input data is sampled at</Description>
<Description>Start of Frame</Description>
<Description>Rising edge of LATCH_IN</Description>
<Description>DC SYNC0 event</Description>
<Description>DC SYNC1 event</Description>
<Description>Input data is sampled at</Description>
<Description>End of Frame</Description>
<Description>DC SYNC0 event</Description>
<Description>DC SYNC1 event</Description>
<Description>PDI Cfg</Description>
<Description>SPI mode</Description>
<Description>SPI IRQ output driver</Description>
<Description>Push-Pull</Description>
<Description>Open</Description>
<Description>SPI IRQ polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SPI SEL polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>Data output sample mode</Description>
<Description>Normal</Description>
<Description>Late</Description>
<Description>SYNC output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC0 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC0 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC0 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC1 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC1 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>PDI Cfg</Description>
<Description>BUSY output driver/polarity</Description>
<Description>Push-Pull active low</Description>
<Description>Open Drain (Active low)</Description>
<Description>Push-Pull active high</Description>
<Description>Open source (Active high)</Description>
<Description>IRQ output driver/polarity</Description>
<Description>Push-Pull active low</Description>
<Description>Open Drain (Active low)</Description>
<Description>Push-Pull active high</Description>
<Description>Open source (Active high)</Description>
<Description>BHE polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>RD polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC0 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC0 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC0 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC1 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC1 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>PDI Cfg</Description>
<Description>BUSY output driver/polarity</Description>
<Description>Push-Pull active low</Description>
<Description>Open Drain (Active low)</Description>
<Description>Push-Pull active high</Description>
<Description>Open source (Active high)</Description>
<Description>IRQ output driver/polarity</Description>
<Description>Push-Pull active low</Description>
<Description>Open Drain (Active low)</Description>
<Description>Push-Pull active high</Description>
<Description>Open source (Active high)</Description>
<Description>BHE polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>RD polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC0 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC0 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC0 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC1 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC1 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>PDI Cfg</Description>
<Description>TA output driver/polarity</Description>
<Description>Push-pull active low</Description>
<Description>Open Drain (Active low)</Description>
<Description>Push-pull active high</Description>
<Description>Open Source (Active high)</Description>
<Description>IRQ output driver/polarity</Description>
<Description>Push-pull active low</Description>
<Description>Open Drain (Active low)</Description>
<Description>Push-pull active high</Description>
<Description>Open Source (Active high)</Description>
<Description>BHE polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>ADR(0) polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>Byte accessmode</Description>
<Description>BHE or Byte select mode</Description>
<Description>Transfer size mode</Description>
<Description>TS polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC0 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC0 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC0 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC1 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC1 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>PDI Cfg</Description>
<Description>TA output driver/polarity</Description>
<Description>Push-pull active low</Description>
<Description>Open Drain (Active low)</Description>
<Description>Push-pull active high</Description>
<Description>Open Source (Active high)</Description>
<Description>IRQ output driver/polarity</Description>
<Description>Push-pull active low</Description>
<Description>Open Drain (Active low)</Description>
<Description>Push-pull active high</Description>
<Description>Open Source (Active high)</Description>
<Description>BHE polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>ADR(0) polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>Byte accessmode</Description>
<Description>BHE or Byte select mode</Description>
<Description>Transfer size mode</Description>
<Description>TS polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC0 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC0 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC0 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC1 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC1 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>PDI Cfg</Description>
<Description>Bridge port physical layer</Description>
<Description>EBUS</Description>
<Description>MII</Description>
<Description>SYNC output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC0 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC0 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC0 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC1 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC1 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>PDI Cfg</Description>
<Description>Bus clock multiplication factor</Description>
<Description>On-chip bus</Description>
<Description>Altera Avalon</Description>
<Description>Xilinx OPB</Description>
<Description>SYNC0 output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC0 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC0 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC0 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 output</Description>
<Description>Push pull</Description>
<Description>Open</Description>
<Description>SYNC1 polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>SYNC1 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>SYNC1 to AL event</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>PDI Cfg Ext</Description>
<Description>Direction of I/O[1:0]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[3:2]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[5:4]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[7:6]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[9:8]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[11:10]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[13:12]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[15:14]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[17:16]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[19:18]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[21:20]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[23:22]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[25:24]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[27:26]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[29:28]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>Direction of I/O[31:30]</Description>
<Description>Input</Description>
<Description>Output</Description>
<Description>PDI Cfg Ext</Description>
<Description>Read BUSY delay</Description>
<Description>Normal read</Description>
<Description>Delayed read</Description>
<Description>PDI Cfg Ext</Description>
<Description>Read BUSY delay</Description>
<Description>Normal read</Description>
<Description>Delayed read</Description>
<Description>PDI Cfg Ext</Description>
<Description>Write data valid</Description>
<Description>Oneclock cycle after CS</Description>
<Description>Together with CS</Description>
<Description>Read mode</Description>
<Description>Use Byte Select</Description>
<Description>Always read 16 bit</Description>
<Description>CS mode</Description>
<Description>Sample with rising edge</Description>
<Description>Sample with falling edge</Description>
<Description>TA/IRQ mode</Description>
<Description>Update with rising edge</Description>
<Description>Update with falling edge</Description>
<Description>PDI Cfg Ext</Description>
<Description>Write data valid</Description>
<Description>Oneclock cycle after CS</Description>
<Description>Together with CS</Description>
<Description>Read mode</Description>
<Description>Use Byte Select</Description>
<Description>Always read 16 bit</Description>
<Description>CS mode</Description>
<Description>Sample with rising edge</Description>
<Description>Sample with falling edge</Description>
<Description>TA/IRQ mode</Description>
<Description>Update with rising edge</Description>
<Description>Update with falling edge</Description>
<Description>PDI Cfg Ext</Description>
<Description>Data bus width</Description>
<Description>4Bytes</Description>
<Description>1Byte</Description>
<Description>2Bytes</Description>
<Description>ECAT IRQ Mask</Description>
<Description>Latch event</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>ESC Status event</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>AL Status event</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM0 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM1 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM2 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM3 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM4 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM5 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM6 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM7 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>PDI IRQ Mask L</Description>
<Description>AL Ctrl</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Latch input</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SYNC 0</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SYNC 1</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM Changed</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>EEPROM command pending</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM0</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM1</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM2</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM3</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM4</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM5</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM6</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM7</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>PDI IRQ Mask H</Description>
<Description>SM8</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM9</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM10</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM11</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM12</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM13</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM14</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM15</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>ECAT IRQ</Description>
<Description>Latch event</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>ESC Status event</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>AL Status event</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM0 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM1 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM2 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM3 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM4 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM5 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM6 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM7 IRQ</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>PDI IRQ 1</Description>
<Description>AL Ctrl</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Latch input</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>DC SYNC 0</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>DC SYNC 1</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM activation reg. changed</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>EEPROM command pending</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Watchdog Process Data expired</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM0</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM1</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM2</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM3</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM4</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM5</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM6</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM7</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>PDI IRQ 2</Description>
<Description>SM8</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM9</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM10</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM11</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM12</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM13</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM14</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SM15</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>CRC A</Description>
<Description>Invalid frame</Description>
<Description>RX error</Description>
<Description>CRC B</Description>
<Description>Invalid frame</Description>
<Description>RX error</Description>
<Description>CRC C</Description>
<Description>Invalid frame</Description>
<Description>RX error</Description>
<Description>CRC D</Description>
<Description>Invalid frame</Description>
<Description>RX error</Description>
<Description>Forw. CRC A/B</Description>
<Description>Port A</Description>
<Description>Port B</Description>
<Description>Forw. CRC C/D</Description>
<Description>Port C</Description>
<Description>Port D</Description>
<Description>Proc. CRC/PDI Err</Description>
<Description>Process unit error</Description>
<Description>PDI error</Description>
<Description>PDI Error Code</Description>
<Description>Number of SPI CLK cycles of whole access</Description>
<Description>Busy violation during read access</Description>
<Description>Read termination missing</Description>
<Description>Access continued</Description>
<Description>SPI command</Description>
<Register pdi="08" esc="04">
<Description>PDI Error Code</Description>
<Description>Busy violation during read access</Description>
<Description>Busy violation during write access</Description>
<Description>Addressing error for a read access</Description>
<Description>Addressing error for a write access</Description>
<Register pdi="09" esc="04">
<Description>PDI Error Code</Description>
<Description>Busy violation during read access</Description>
<Description>Busy violation during write access</Description>
<Description>Addressing error for a read access</Description>
<Description>Addressing error for a write access</Description>
<Register pdi="0a" esc="04">
<Description>PDI Error Code</Description>
<Description>Busy violation during read access</Description>
<Description>Busy violation during write access</Description>
<Description>Addressing error for a read access</Description>
<Description>Addressing error for a write access</Description>
<Register pdi="0b" esc="04">
<Description>PDI Error Code</Description>
<Description>Busy violation during read access</Description>
<Description>Busy violation during write access</Description>
<Description>Addressing error for a read access</Description>
<Description>Addressing error for a write access</Description>
<Description>Link Lost A/B</Description>
<Description>Port A</Description>
<Description>Port B</Description>
<Description>Link Lost C/D</Description>
<Description>Port C</Description>
<Description>Port D</Description>
<Description>WD Divisor</Description>
<Description>WD Time PDI</Description>
<Description>WD Time SM</Description>
<Description>WD Status</Description>
<Description>PD watchdog</Description>
<Description>expired</Description>
<Description>active or disabled</Description>
<Description>WD PDI/SM Counter</Description>
<Description>SM watchdog cnt</Description>
<Description>PDI watchdog cnt</Description>
<!--SII EEPROM Interface-->
<Description>EEPROM Assign</Description>
<Description>EEPROM access ctrl</Description>
<Description>ECAT</Description>
<Description>PDI</Description>
<Description>Reset PDIaccess</Description>
<Description>Do not change Bit 501.0</Description>
<Description>Reset Bit 501.0 to 0</Description>
<Description>EEPROM access status</Description>
<Description>ECAT</Description>
<Description>PDI</Description>
<Description>EEPROM Ctrl/Status</Description>
<Description>Write access</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>EEPROM emulation</Description>
<Description>Normal operation</Description>
<Description>PDI emulates EEPROM</Description>
<Description>8 byte access</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>2 byte address</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Read access</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Write access</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Reload access</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>CRC error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Load error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Cmd error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Write error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Busy</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>EEPROM Address L</Description>
<Description>EEPROM Address H</Description>
<Description>EEPROM Data 0</Description>
<Description>EEPROM Data 1</Description>
<Description>EEPROM Data 2</Description>
<Description>EEPROM Data 3</Description>
<!--MII Management Interface-->
<Description>Phy MIO Ctrl/Status</Description>
<Description>Write enable</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>PDI control possible</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Link detection active</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Phy address offset</Description>
<Description>Read access</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Write access</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Read error occured</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Write error occured</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Busy</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Phy MIO Address</Description>
<Description>Phy address</Description>
<Description>MIO address</Description>
<Description>Phy MIO Data</Description>
<Description>MIO Access</Description>
<Description>ECAT claims exclusive access</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>PDI hasaccess to MII management</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Force PDI to reset 517.0</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>MIO Port Status A/B</Description>
<Description>Port A: Physical link detected</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port A: Link detected</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port A: Link status error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port A: Read error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port A: Link partner error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port A: Phy config updated</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port B: Physical link detected</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port B: Link detected</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port B: Link status error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port B: Read error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port B: Link partner error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port B: Phy config updated</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>MIO Port Status C/D</Description>
<Description>Port C: Physical link detected</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port C: Link detected</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port C: Link status eror</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port C: Read error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port C: Link partner error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port C: Phy config updated</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port D: Physical link detected</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port D: Link detected</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port D: Link status error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port D: Read error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port D: Link partner error</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Port D: Phy config updated</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>F0 lStart L</Description>
<Description>F0 lStart H</Description>
<Description>F0 lLength</Description>
<Description>F0 lStartEndBit</Description>
<Description>F0 pStart</Description>
<Description>F0 pStartBit/Dir</Description>
<Description>F0 Enable</Description>
<Description>F1 lStart L</Description>
<Description>F1 lStart H</Description>
<Description>F1 lLength</Description>
<Description>F1 lStartEndBit</Description>
<Description>F1 pStart</Description>
<Description>F01 pStartBit/Dir</Description>
<Description>F1 Enable</Description>
<Description>F2 lStart L</Description>
<Description>F2 lStart H</Description>
<Description>F2 lLength</Description>
<Description>F2 lStartEndBit</Description>
<Description>F2 pStart</Description>
<Description>F2 pStartBit/Dir</Description>
<Description>F2 Enable</Description>
<Description>F3 lStart L</Description>
<Description>F3 lStart H</Description>
<Description>F3 lLength</Description>
<Description>F3 lStartEndBit</Description>
<Description>F3 pStart</Description>
<Description>F3 pStartBit/Dir</Description>
<Description>F3 Enable</Description>
<Description>F4 lStart L</Description>
<Description>F4 lStart H</Description>
<Description>F4 lLength</Description>
<Description>F4 lStartEndBit</Description>
<Description>F4 pStart</Description>
<Description>F4 pStartBit/Dir</Description>
<Description>F4 Enable</Description>
<Description>F5 lStart L</Description>
<Description>F5 lStart H</Description>
<Description>F5 lLength</Description>
<Description>F5 lStartEndBit</Description>
<Description>F5 pStart</Description>
<Description>F5 pStartBit/Dir</Description>
<Description>F5 Enable</Description>
<Description>F6 lStart L</Description>
<Description>F6 lStart H</Description>
<Description>F6 lLength</Description>
<Description>F6 lStartEndBit</Description>
<Description>F6 pStart</Description>
<Description>F6 pStartBit/Dir</Description>
<Description>F6 Enable</Description>
<Description>F7 lStart L</Description>
<Description>F7 lStart H</Description>
<Description>F7 lLength</Description>
<Description>F7 lStartEndBit</Description>
<Description>F7 pStart</Description>
<Description>F7 pStartBit/Dir</Description>
<Description>F7 Enable</Description>
<Description>F8 lStart L</Description>
<Description>F8 lStart H</Description>
<Description>F8 lLength</Description>
<Description>F8 lStartEndBit</Description>
<Description>F8 pStart</Description>
<Description>F8 pStartBit/Dir</Description>
<Description>F8 Enable</Description>
<Description>F9 lStart L</Description>
<Description>F9 lStart H</Description>
<Description>F9 lLength</Description>
<Description>F9 lStartEndBit</Description>
<Description>F9 pStart</Description>
<Description>F9 pStartBit/Dir</Description>
<Description>F9 Enable</Description>
<Description>F10 lStart L</Description>
<Description>F10 lStart H</Description>
<Description>F10 lLength</Description>
<Description>F10 lStartEndBit</Description>
<Description>F10 pStart</Description>
<Description>F10 pStartBit/Dir</Description>
<Description>F10 Enable</Description>
<Description>F11 lStart L</Description>
<Description>F11 lStart H</Description>
<Description>F11 lLength</Description>
<Description>F11 lStartEndBit</Description>
<Description>F11 pStart</Description>
<Description>F11 pStartBit/Dir</Description>
<Description>F11 Enable</Description>
<Description>F12 lStart L</Description>
<Description>F12 lStart H</Description>
<Description>F12 lLength</Description>
<Description>F12 lStartEndBit</Description>
<Description>F12 pStart</Description>
<Description>F12 pStartBit/Dir</Description>
<Description>F12 Enable</Description>
<Description>F13 lStart L</Description>
<Description>F13 lStart H</Description>
<Description>F13 lLength</Description>
<Description>F13 lStartEndBit</Description>
<Description>F13 pStart</Description>
<Description>F13 pStartBit/Dir</Description>
<Description>F13 Enable</Description>
<Description>F14 lStart L</Description>
<Description>F14 lStart H</Description>
<Description>F14 lLength</Description>
<Description>F14 lStartEndBit</Description>
<Description>F14 pStart</Description>
<Description>F14 pStartBit/Dir</Description>
<Description>F14 Enable</Description>
<Description>F15 lStart L</Description>
<Description>F15 lStart H</Description>
<Description>F15 lLength</Description>
<Description>F15 lStartEndBit</Description>
<Description>F15 pStart</Description>
<Description>F15 pStartBit/Dir</Description>
<Description>F15 Enable</Description>
<Description>SM0 Start</Description>
<Description>SM0 Length</Description>
<Description>SM0 Ctrl/Status</Description>
<Description>SM0 Enable</Description>
<Description>SM1 Start</Description>
<Description>SM1 Length</Description>
<Description>SM1 Ctrl/Status</Description>
<Description>SM1 Enable</Description>
<Description>SM2 Start</Description>
<Description>SM2 Length</Description>
<Description>SM2 Ctrl/Status</Description>
<Description>SM2 Enable</Description>
<Description>SM3 Start</Description>
<Description>SM3 Length</Description>
<Description>SM3 Ctrl/Status</Description>
<Description>SM3 Enable</Description>
<Description>SM4 Start</Description>
<Description>SM4 Length</Description>
<Description>SM4 Ctrl/Status</Description>
<Description>SM4 Enable</Description>
<Description>SM5 Start</Description>
<Description>SM5 Length</Description>
<Description>SM5 Ctrl/Status</Description>
<Description>SM5 Enable</Description>
<Description>SM6 Start</Description>
<Description>SM6 Length</Description>
<Description>SM6 Ctrl/Status</Description>
<Description>SM6 Enable</Description>
<Description>SM7 Start</Description>
<Description>SM7 Length</Description>
<Description>SM7 Ctrl/Status</Description>
<Description>SM7 Enable</Description>
<Description>SM8 Start</Description>
<Description>SM8 Length</Description>
<Description>SM8 Ctrl/Status</Description>
<Description>SM8 Enable</Description>
<Description>SM9 Start</Description>
<Description>SM9 Length</Description>
<Description>SM9 Ctrl/Status</Description>
<Description>SM9 Enable</Description>
<Description>SM10 Start</Description>
<Description>SM10 Length</Description>
<Description>SM10 Ctrl/Status</Description>
<Description>SM10 Enable</Description>
<Description>SM11 Start</Description>
<Description>SM11 Length</Description>
<Description>SM11 Ctrl/Status</Description>
<Description>SM11 Enable</Description>
<Description>SM12 Start</Description>
<Description>SM12 Length</Description>
<Description>SM12 Ctrl/Status</Description>
<Description>SM12 Enable</Description>
<Description>SM13 Start</Description>
<Description>SM13 Length</Description>
<Description>SM13 Ctrl/Status</Description>
<Description>SM13 Enable</Description>
<Description>SM14 Start</Description>
<Description>SM14 Length</Description>
<Description>SM14 Ctrl/Status</Description>
<Description>SM14 Enable</Description>
<Description>SM15 Start</Description>
<Description>SM15 Length</Description>
<Description>SM15 Ctrl/Status</Description>
<Description>SM15 Enable</Description>
<!--DC - Receive Times-->
<Description>DC RecvTimeL_A</Description>
<Description>DC RecvTimeH_A</Description>
<Description>DC RecvTimeL_B</Description>
<Description>DC RecvTimeH_B</Description>
<Description>DC RecvTimeL_C</Description>
<Description>DC RecvTimeH_C</Description>
<Description>DC RecvTimeL_D</Description>
<Description>DC RecvTimeH_D</Description>
<!--DC - Time Loop Control Unit-->
<Description>DC SysTimeLL</Description>
<Description>DC SysTimeLH</Description>
<Description>DC SysTimeHL</Description>
<Description>DC SysTimeHH</Description>
<Description>DC RecvTimeLL_A</Description>
<Description>DC RecvTimeLH_A</Description>
<Description>DC RecvTimeHL_A</Description>
<Description>DC RecvTimeHH_A</Description>
<Description>DC SysTimeOffsLL</Description>
<Description>DC SysTimeOffsLH</Description>
<Description>DC SysTimeOffsHL</Description>
<Description>DC SysTimeOffsHH
<Description>DC SysTimeDelayL</Description>
<Description>DC SysTimeDelayH</Description>
<Description>DC CtrlErrorL</Description>
<Description>DC CtrlErrorH</Description>
<Description>DC SpeedStart</Description>
<Description>DC SpeedDiff</Description>
<Description>DC FiltExp</Description>
<Description>System time diff</Description>
<Description>Speed counter</Description>
<Description>Receive Time Latch Mode</Description>
<Description>Receive Time Latch Mode</Description>
<Description>Forwarding mode</Description>
<Description>Reverse mode</Description>
<Description>Receive Time Latch Mode</Description>
<Description>Receive Time Latch Mode</Description>
<Description>Forwarding mode</Description>
<Description>Reverse mode</Description>
<!--DC - Cyclic Unit Control / SYNC Out Unit-->
<Description>DC Assign/Active</Description>
<Description>Write access cyclic</Description>
<Description>ECAT</Description>
<Description>PDI</Description>
<Description>Write access Latch 0</Description>
<Description>ECAT</Description>
<Description>PDI</Description>
<Description>Write access Latch 1</Description>
<Description>ECAT</Description>
<Description>PDI</Description>
<Description>Sync out unit activation</Description>
<Description>Deactivated</Description>
<Description>Activated</Description>
<Description>Generate SYNC 0</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Generate SYNC 1</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Auto activation</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Start time extension 32->64</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Start time check</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Half range</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Debuspulse</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>DC CycImpulse</Description>
<Description>DC Activation Status</Description>
<Description>SYNC0 pending</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SYNC1 pending</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Start Time</Description>
<Description>Within near future</Description>
<Description>Out of near future</Description>
<Description>DC CycSync State</Description>
<Description>SYNC 0 triggered</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>SYNC 1 triggered</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>DC StartTime0 LL</Description>
<Description>DC StartTime0 LH</Description>
<Description>DC StartTime0 HL</Description>
<Description>DC StartTime0 HH</Description>
<Description>DC StartTime1 LL</Description>
<Description>DC StartTime1 LH</Description>
<Description>DC StartTime1 HL</Description>
<Description>DC StartTime1 HH</Description>
<Description>DC CycTime0 L</Description>
<Description>DC CycTime0 H</Description>
<Description>DC CycTime1 L</Description>
<Description>DC CycTime1 H</Description>
<!--DC - Latch In Unit-->
<Description>DC Latch Ctrl</Description>
<Description>Latch 0 pos</Description>
<Description>Continuous</Description>
<Description>Single event</Description>
<Description>Latch 0 neg</Description>
<Description>Continuous</Description>
<Description>Single event</Description>
<Description>Latch 1 pos</Description>
<Description>Continuous</Description>
<Description>Single event</Description>
<Description>Latch 1 neg</Description>
<Description>Continuous</Description>
<Description>Single event</Description>
<Description>DC Latch Status</Description>
<Description>Event Latch 0 pos</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Event Latch 0 neg</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Latch 0 pin state</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Event Latch 1 pos</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Event Latch 1 neg</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>Latch 1 pin state</Description>
<Description>FALSE</Description>
<Description>TRUE</Description>
<Description>DC Latch0 Pos LL</Description>
<Description>DC Latch0 Pos LH</Description>
<Description>DC Latch0 Pos HL</Description>
<Description>DC Latch0 Pos HH</Description>
<Description>DC Latch0 Neg LL</Description>
<Description>DC Latch0 Neg LH</Description>
<Description>DC Latch0 Neg HL</Description>
<Description>DC Latch0 Neg HH</Description>
<Description>DC Latch1 Pos LL</Description>
<Description>DC Latch1 Pos LH</Description>
<Description>DC Latch1 Pos HL</Description>
<Description>DC Latch1 Pos HH</Description>
<Description>DC Latch1 Neg LL</Description>
<Description>DC Latch1 Neg LH</Description>
<Description>DC Latch1 Neg HL</Description>
<Description>DC Latch1 Neg HH</Description>
<!--DC - SyncManager Event Times-->
<Description>DC RecvSMChange L</Description>
<Description>DC RecvSMChange H</Description>
<Description>DC PDISMStart L</Description>
<Description>DC PDISMStart H</Description>
<Description>DC PDISMChange L</Description>
<Description>DC PDISMChange H</Description>
<Description>Product ID</Description>
<Description>Product ID</Description>
<Description>Product ID</Description>
<Description>Vendor ID</Description>
<Description>Vendor ID</Description>
<Description>Vendor ID</Description>
<Description>Power On</Description>
<Description>Port mode</Description>
<Description>Port 0, 1</Description>
<Description>Port 0, 1, 2</Description>
<Description>Port 0, 1, 3</Description>
<Description>Port 0, 1, 2, 3</Description>
<Description>Logical port 0</Description>
<Description>EBUS</Description>
<Description>MII</Description>
<Description>Logical port 1</Description>
<Description>EBUS</Description>
<Description>MII</Description>
<Description>Logical port 2</Description>
<Description>EBUS</Description>
<Description>MII</Description>
<Description>Logical port 3</Description>
<Description>EBUS</Description>
<Description>MII</Description>
<Description>CPU clock output</Description>
<Description>Off - PDI[7] available as PDI port</Description>
<Description>PDI[7]=25MHz</Description>
<Description>PDI[7]=20MHz</Description>
<Description>PDI[7]=10MHz</Description>
<Description>TX signal shift</Description>
<Description>MII TX shifted 0</Description>
<Description>MII TX shifted 90</Description>
<Description>MII TX shifted 180</Description>
<Description>MII TX shifted 270</Description>
<Description>Clock 25 output</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>Transparent mode MII</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>Digital Ctrl/Status move</Description>
<Description>PDI[39:32]</Description>
<Description>the highest available PDI Byte</Description>
<Description>Phy offset</Description>
<Description>No offset</Description>
<Description>16 offset</Description>
<Description>Phy link polarity</Description>
<Description>Active low</Description>
<Description>Active high</Description>
<Description>Power On</Description>
<Description>Chip mode</Description>
<Description>Port0:EBUS, Port1:EBUS, 18bit PDI</Description>
<Description>Port0:MII, Port1:EBUS, 8bit PDI</Description>
<Description>Port0:EBUS, Port1:MII, 8bit PDI</Description>
<Description>CPU clock output</Description>
<Description>Off - PDI[7] available as PDI port</Description>
<Description>PDI[7]=25MHz</Description>
<Description>PDI[7]=20MHz</Description>
<Description>PDI[7]=10MHz</Description>
<Description>TX signal shift</Description>
<Description>MII TX signals shifted by 0</Description>
<Description>MII TX signals shifted by 90</Description>
<Description>MII TX signals shifted by 180</Description>
<Description>MII TX signals shifted by 270</Description>
<Description>CLK25 Output Enable</Description>
<Description>Disabled</Description>
<Description>Enabled</Description>
<Description>Phy address offset</Description>
<Description>No offset</Description>
<Description>16 offset</Description>
<Description>Digital Out L</Description>
<Description>Digital Out H</Description>
<Description>GPO LL</Description>
<Description>GPO LH</Description>
<Description>GPO HL</Description>
<Description>GPO HH</Description>
<Description>GPI LL</Description>
<Description>GPI LH</Description>
<Description>GPI HL</Description>
<Description>GPI HH</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>
<Description>User Ram</Description>