lpcmanager

New RTDM API for Xenomai 3.... POSIX !!!
revamp
2018-03-23, Edouard Tisserant
3ad801203d38
Parents 63d015d37528
Children bd451154e9f8
New RTDM API for Xenomai 3.... POSIX !!!
--- a/LPCBus/MC9_OnBoard_cleanup.c Thu Mar 22 13:48:24 2018 +0100
+++ b/LPCBus/MC9_OnBoard_cleanup.c Fri Mar 23 11:30:50 2018 +0100
@@ -8,7 +8,7 @@
#ifdef ONBOARD_I2C
if(onboardbusfd!=-1)
- rt_dev_close(onboardbusfd);
+ close(onboardbusfd);
#endif /* ONBOARD_I2C */
#ifdef CAN0_EN_GPIO_0_21
--- a/LPCBus/MC9_OnBoard_init.c Thu Mar 22 13:48:24 2018 +0100
+++ b/LPCBus/MC9_OnBoard_init.c Fri Mar 23 11:30:50 2018 +0100
@@ -1,4 +1,4 @@
-#define ONBOARDDEVFILENAME "onBoard"
+#define ONBOARDDEVFILENAME "/dev/rtdm/onBoard"
int err;
@@ -53,16 +53,16 @@
switch(onBoardDev[i][1]) {
case 1:
/* OnBoard I2C bus */
- onboardbusfd = rt_dev_open(ONBOARDDEVFILENAME, 0);
+ onboardbusfd = open(ONBOARDDEVFILENAME, 0);
if(onboardbusfd < 0) {
printf("can't open %%s rtdm device, %%s\n", ONBOARDDEVFILENAME,
strerror(-onboardbusfd));
return onboardbusfd;
}
- err = rt_dev_ioctl(onboardbusfd, RTSMT_ONBOARD_RTIOC_INIT, &onBoardBusInit);
+ err = ioctl(onboardbusfd, RTSMT_ONBOARD_RTIOC_INIT, &onBoardBusInit);
if(err) {
printf("error while RTSMT_ONBOARD_RTIOC_INIT, %%s\n", strerror(-err));
- rt_dev_close(onboardbusfd);
+ close(onboardbusfd);
return err;
}
break;
--- a/LPCBus/MC9_OnBoard_publish.c Thu Mar 22 13:48:24 2018 +0100
+++ b/LPCBus/MC9_OnBoard_publish.c Fri Mar 23 11:30:50 2018 +0100
@@ -8,5 +8,5 @@
#ifdef ONBOARD_I2C
if(onboardbusfd!=-1)
- rt_dev_ioctl(onboardbusfd, RTSMT_ONBOARD_RTIOC_WRITE, &onBoardWriteBuf);
+ ioctl(onboardbusfd, RTSMT_ONBOARD_RTIOC_WRITE, &onBoardWriteBuf);
#endif /* ONBOARD_I2C */
--- a/LPCBus/MC9_OnBoard_retrieve.c Thu Mar 22 13:48:24 2018 +0100
+++ b/LPCBus/MC9_OnBoard_retrieve.c Fri Mar 23 11:30:50 2018 +0100
@@ -2,7 +2,7 @@
#ifdef ONBOARD_I2C
if(onboardbusfd!=-1)
- rt_dev_ioctl(onboardbusfd, RTSMT_ONBOARD_RTIOC_READ, &onBoardReadBuf);
+ ioctl(onboardbusfd, RTSMT_ONBOARD_RTIOC_READ, &onBoardReadBuf);
#endif /* ONBOARD_I2C */
%(retrieve_code)s
--- a/LPCBus/MC9_Right_cleanup.c Thu Mar 22 13:48:24 2018 +0100
+++ b/LPCBus/MC9_Right_cleanup.c Fri Mar 23 11:30:50 2018 +0100
@@ -1,1 +1,1 @@
-rt_dev_close(rightbusfd);
+close(rightbusfd);
--- a/LPCBus/MC9_Right_init.c Thu Mar 22 13:48:24 2018 +0100
+++ b/LPCBus/MC9_Right_init.c Fri Mar 23 11:30:50 2018 +0100
@@ -1,4 +1,4 @@
-#define DEVICEFILENAME "rightbus"
+#define DEVICEFILENAME "/dev/rtdm/rightbus"
bzero(&rightReadBuf, sizeof(rightReadBuf_t));
bzero(&rightWriteBuf, sizeof(rightWriteBuf_t));
@@ -10,17 +10,17 @@
%(init_code)s
int err;
-rightbusfd = rt_dev_open( DEVICEFILENAME, 0);
+rightbusfd = open( DEVICEFILENAME, 0);
if (rightbusfd < 0) {
printf("can't open %%s rtdm device, %%s\\n", DEVICEFILENAME,
strerror(-rightbusfd));
return rightbusfd;
}
-err = rt_dev_ioctl(rightbusfd, RTSMT_RTIOC_INIT, &rightBusInit);
+err = ioctl(rightbusfd, RTSMT_RTIOC_INIT, &rightBusInit);
if (err) {
printf("error while RTSMT_RTIOC_INIT, %%s\\n",
strerror(-err));
- rt_dev_close(rightbusfd);
+ close(rightbusfd);
return err;
}
--- a/LPCBus/MC9_Right_publish.c Thu Mar 22 13:48:24 2018 +0100
+++ b/LPCBus/MC9_Right_publish.c Fri Mar 23 11:30:50 2018 +0100
@@ -1,2 +1,2 @@
%(publish_code)s
-rt_dev_ioctl(rightbusfd, RTSMT_RTIOC_WRITE, &rightWriteBuf);
+ioctl(rightbusfd, RTSMT_RTIOC_WRITE, &rightWriteBuf);
--- a/LPCBus/MC9_Right_retrieve.c Thu Mar 22 13:48:24 2018 +0100
+++ b/LPCBus/MC9_Right_retrieve.c Fri Mar 23 11:30:50 2018 +0100
@@ -1,2 +1,2 @@
-rt_dev_ioctl(rightbusfd, RTSMT_RTIOC_READ, &rightReadBuf);
+ioctl(rightbusfd, RTSMT_RTIOC_READ, &rightReadBuf);
%(retrieve_code)s
--- a/MC9target/plc_MC9_main_retain.c Thu Mar 22 13:48:24 2018 +0100
+++ b/MC9target/plc_MC9_main_retain.c Fri Mar 23 11:30:50 2018 +0100
@@ -60,24 +60,24 @@
int size;
unsigned int uint;
uint = 1;
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_LOCK_CS_SET, &uint) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_LOCK_CS_SET, &uint) < 0) {
printf("Failed to lock CS\n");
return 0;
}
- status = rt_dev_write(fd_spi, rcmd, ARRAY_SIZE(rcmd));
+ status = write(fd_spi, rcmd, ARRAY_SIZE(rcmd));
if (status < 0) {
fprintf(stderr, "Failed to send read command. ERR : %d\n", status);
return 0;
}
uint = 0;
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_LOCK_CS_SET, &uint) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_LOCK_CS_SET, &uint) < 0) {
printf("Failed to unlock CS\n");
return 0;
}
- size = rt_dev_read(fd_spi, buf, len);
+ size = read(fd_spi, buf, len);
if (size != len) {
fprintf(stderr, "Failed to read %d bytes on the SPI bus. size : %d\n",
len, size);
@@ -89,7 +89,7 @@
int SPI_Write(void *buf, unsigned int len){
int status;
- status = rt_dev_write(fd_spi, buf, len);
+ status = write(fd_spi, buf, len);
if (status < 0) {
fprintf(stderr, "Failed to write memory. ERR : %d\n", status);
return 0;
@@ -103,7 +103,7 @@
unsigned int uint;
/* Open the SPI RTDM device */
- if ((fd_spi = rt_dev_open("spi_apf28_rtdm", TEST_SPI_BUS_NUMBER)) < 0) {
+ if ((fd_spi = open("/dev/rtdm/spi_apf28_rtdm", TEST_SPI_BUS_NUMBER)) < 0) {
printf("rt_spi_open error\n");
return;
}
@@ -112,66 +112,66 @@
/* Clock phase */
uint = TEST_SPI_CLK_PHASE;
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_CLKPHASE_SET, &uint) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_CLKPHASE_SET, &uint) < 0) {
printf("Failed to configure the clock phase\n");
return;
}
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_CLKPHASE_GET, &uint) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_CLKPHASE_GET, &uint) < 0) {
printf("Failed to get the clock phase\n");
return;
}
/* Clock polarity */
uint = TEST_SPI_CLK_POLARITY;
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_CLKPOLARITY_SET, &uint) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_CLKPOLARITY_SET, &uint) < 0) {
printf("Failed to configure the clock polarity\n");
return;
}
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_CLKPOLARITY_GET, &uint) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_CLKPOLARITY_GET, &uint) < 0) {
printf("Failed to get the clock polarity\n");
return;
}
/* Frequency */
ulong = TEST_SPI_SPEED;
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_FREQ_SET, &ulong) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_FREQ_SET, &ulong) < 0) {
printf("Failed to configure the frequency\n");
return;
}
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_FREQ_GET, &ulong) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_FREQ_GET, &ulong) < 0) {
printf("Failed to get the frequency\n");
return;
}
/* Bits per word */
uint = TEST_SPI_BITS_PER_WORD;
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_BITSPERWORD_SET, &uint) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_BITSPERWORD_SET, &uint) < 0) {
printf("Failed to configure the BPW\n");
return;
}
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_BITSPERWORD_GET, &uint) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_BITSPERWORD_GET, &uint) < 0) {
printf("Failed to get the BPW\n");
return;
}
/* Chipselect */
uint = TEST_SPI_CHIPSELECT1;
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_CHIPSELECT_SET, &uint) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_CHIPSELECT_SET, &uint) < 0) {
printf("Failed to configure the chip select\n");
return;
}
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_CHIPSELECT_GET, &uint) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_CHIPSELECT_GET, &uint) < 0) {
printf("Failed to get the chip select\n");
return;
}
/* DMA usage definition */
uint = TEST_SPI_DMA_BYTES_MIN;
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_DMA_SET, &uint) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_DMA_SET, &uint) < 0) {
printf("Failed to configure the DMA threshold\n");
return;
}
- if (rt_dev_ioctl(fd_spi, RTDM_SPI_DMA_GET, &uint) < 0) {
+ if (ioctl(fd_spi, RTDM_SPI_DMA_GET, &uint) < 0) {
printf("Failed to get the DMA threshold\n");
return;
}
@@ -194,7 +194,7 @@
0x01, 0x40,
};
- status = rt_dev_write(fd_spi, mbuf, ARRAY_SIZE(mbuf));
+ status = write(fd_spi, mbuf, ARRAY_SIZE(mbuf));
if (status < 0) {
printf("Failed to change mode. ERR : %d\n", status);
return;